Currently using Creo Schematics 12, trying to perfect the CID-to-WID process.
One issue that I have noticed is that if a dataset it applied to a circuit, in the circuit interface diagram, then that dataset does not get transferred to the wiring diagram.
For example, if create a circuit in the CID, and assign a dataset to this circuit (20 AWG, BLACK, TXL), when I place the corresponding wire in the WID, I would expect the wire to be 20AWG, BLACK, TXL.
However, this is not the case. All datasets have to be reassigned to each wire.
Am I overlooking a parameter, or anything?
Is this working as intended?
If it's working as intended, why can't the circuit dataset be applied to each corresponding wire? Otherwise you're duplicating efforts, thus creating more work than necessary.
